1. Technical Field
The disclosure relates generally to through silicon vias, and more particularly, to arranging through silicon vias (TSVs) in an integrated circuit (IC) layout to reduce linearly aligned TSVs.
2. Background Art
Through silicon vias (TSVs) are vias that extend through a semiconductor wafer to allow wafer-to-wafer interconnects that are compatible with three-dimensional wafer-level packaging. TSVs are typically elongated in one direction.